We don't care about reasd we care about writes because they alter state
- modified indicates that we've just written
- exclusive means cache slot is in sync with MM and not present anywhere else
- shared means theres multiple instances of the cache slot but they havent been modified
- invalid means that we might have had something but someone else elsewhere wrote to the same location
True sharing miss vs false sharing miss
- so a very simplistic scanrio, we have 2 words in a shared cache slot. were interested in knoeing whst is a true sharing miss vs false sharing. here's our sequence of readsa nad writes
- time step: cache x: cache y
- 1 Write A
- 2 Read B
- 3 Write A
- 4 Write B
- 5 Read B
- cache X [ A , B]
- Cache Y [ A , B]
- Previous CPU Y was sharing
- A true sharing miss as CPU Y is invalidated
- CPU Y was originally sharing with CPU X
if theyre shared and we write, that is a true sharing miss
if we then try to perform a read we get a false sharing miss. the slot got invalidated, but the thing that we're trying to read is not actually the thing that changed. but we still have to go through the process of servicing the miss and bringing the slot back to sharing. so its “false”
What if we write to b, the locations are different so it's still a false miss
The last one is a true sharing miss because we wrote to it and invalidated it, and then we want to read from it.
look at ur paper for more about this
Syncronization can be done with locks. that serializes accesses but it slows everything down
What happens is the use of relaxed consistency models, in which case we're making use of speculative execution using the reorder buffer to hold onto the writes
depending on the cpu framework/manufactuerer, they may or may not support read after writes
as we've seen before with speculative 3execution, the bottleneck becomes the reorder buffer
What happens is the use of relaxed consistency models, in which case we're making use of speculative execution using the reorder buffer to hold onto the writes
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