- We have our 5 stage pipe
- We want each stage to be totally independent
- We have our general purpose registers, and our latches that are used for forwarding
→ These retain state across stages of the pipe.
→ We have 4 different instruction registers in the machine at a time
→ Also have a NPC register in this latch
→ We sometimes have registers A and B in there where necessary
→ We also have an ALU out register
→ We also have a CMD register and a taken/not taken register (for branches)
- Duration of the clock cycle is constant for each stage.
- There's the diagram that characterizes half cycle clocking
→ half cylcle clocking comes in handy when performing a WB and a decode in the same clock cycle
→ in the first half cycle we write, in the second we read.
- These are the things we are testing when we identify whether we need to forward something or not.

- we have a target interstage pipeline register and a source.
- The process of testing a branch involves multiple stages in the pipe. First you have to check if the EX/MEM register has the branch opcode, and the codition is true. In that case, set the PC to the value in EX/MEM.ALUout. otherwise do PC + 4

- At the EX/MEM register, if youre not performing a read to memory, then you simply forward the result to the next latch. You can't immediately write the value to the register bank because theres a value already doing that for the current clock cycle.
- IR is present at every single stage, and is directly forwarded.
→ If you lost an IR it would be bad.
- “Youre confabulating different stuff” ← new word: confabulating

- Forwarding requires buses.
- Bazinga
- The item the registers are passing back is the target.

- Decode is the most ugly stage from the POV of control. It figures out what it needs, and figures out whether the answer is curretnly in the pipe. It then needs to quickly figure out the path it needs to take in order to keep things moving.
- What are the two cases we can't forward ourselves out of?
→ LDM to execute always costs a stall cycle
→ branch instructions need the information in the execute stage.

Index